1. Field of the Invention
In some embodiments, the present invention pertains to surface-modified colloidal abrasive polishing compositions and associated methods of using these compositions, particularly for chemical mechanical planarization (CMP), wherein the slurry comprises a fluoride-surface-modified colloidal abrasive. More particularly, in some embodiments, the invention relates to an improved composition and process for the chemical mechanical polishing or planarization of semiconductor wafers tailored to meet more stringent requirements of advanced integrated circuit fabrication. In some embodiments, the present invention particularly relates to compositions for polishing substrates comprising at least one dielectric material using a chemical-mechanical polishing system comprising surface-modified colloidal silica and in particular a fluoride-surface-modified colloidal silica.
2. Description of the Related Art
CMP for planarization of semiconductor substrates is now widely known to those skilled in the art and has been described in numerous patents and open literature publications. Some introductory references on CMP are as follows: “Polishing Surfaces for Integrated Circuits”, by B. L. Mueller and J. S. Steckenrider, Chemtech, February, 1998, pp. 38-46; H. Landis et al., Thin Solids Films, 220 (1992), page 1; and “Chemical-Mechanical Polish” by G. B. Shinn et al., Chapter 15, pages 415-460, in Handbook of Semiconductor Manufacturing Technology, editors: Y. Nishi and R. Doering, Marcel Dekker, New York City (2000).
In a typical CMP process, a substrate (e.g., a wafer) is placed in contact with a moving polishing pad, for example, a rotating polishing pad attached to a platen. A CMP slurry, typically an abrasive and chemically reactive mixture, is supplied to the pad during CMP processing of the substrate. Typically, metal CMP slurries contain an abrasive material, such as silica or alumina, suspended in an oxidizing, aqueous medium. The abrasive may alternatively be partially or fully bound to the polishing pad. During the CMP process, the pad (typically fixed to the platen) and substrate are moved, typically by rotating both, while a wafer carrier system or polishing head applies pressure (downward force) against the substrate. The slurry or polishing liquid in combination with an abrasive polishing pad accomplishes the planarization (polishing) process by chemically and mechanically interacting with the substrate film being planarized due to the effect of the movement of the pad relative to the substrate. Polishing is continued in this manner until the desired film on the substrate is removed with the usual objective being to effectively planarize the substrate.
Silicon based semiconductor devices, such as integrated circuits (ICs), typically include a dielectric layer. Multilevel circuit traces, typically formed from aluminum or an aluminum alloy or copper, are patterned onto the dielectric layer substrate. There are numerous types of layers that can be polished by CMP, for example, silicon nitride, interlayer dielectrics (ILD) such as silicon oxide and low-k films including carbon-doped oxides; metal layers such as tungsten, copper, aluminum, etc., which are used to connect the active devices; and barrier layer materials such as titanium, titanium nitride, tantalum, tantalum nitride, noble metals, etc.
CMP processing is often employed in semiconductor manufacturing to remove excess metal at different stages. Various metals and metal alloys have been used at different stages of semiconductor manufacturing, including tungsten, aluminum, copper, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, platinum, iridium, and combinations thereof. For example, one way to fabricate a multilevel copper interconnect or planar copper circuit traces on a dielectric substrate is referred to as the damascene process.
Surface modification of the abrasive is known. Colloidal silica, for example, has been modified with various metallic compounds as disclosed in U.S. Pat. Nos. 3,252,917, 3,620,978 and 3,745,126; U.S. patent applications Nos. 2003/0162398, 2004/0006924, 2004/0029495, and 2005/0155296; EP Patent Publication 1 000 995; and also in the book entitled “The Chemistry of Silica”, R. K. Iler, Wiley Interscience (1979), pages 410-411. Abrasives such as silica, ceria, and titania have been surface-modified with boron-containing compounds such as boric acid, as disclosed in co-owned U.S. Pat. No. 6,743,267, the disclosure of which is incorporated by reference herein. Other patents of interest include U.S. Pat. No. 3,620,978 issued to DuPont; U.S. Pat. No. 5,993,686 issued to Cabot Corporation; U.S. Pat. No. 6,471,735 issued to Air Liquide America Corporation; and U.S. Patent Publication No. 2004/0144038 to DuPont Air Products Nanomaterials.
During the fabrication of integrated circuit (IC) devices, polishing slurries for chemical mechanical planarization of tungsten must meet several criteria such as: high tungsten removal rates, minimal erosion of dielectric layers, high tungsten-to-dielectric layer removal rate selectivity, low tungsten to titanium selectivity, low tungsten static etch rates, and low contamination from catalysts, which in the prior art are typically multivalent soluble cations such as iron salts and fluoride sources such as hydrogen fluoride, ammonium fluoride, and other fluoride salts.
For CMP application, in the prior art, water soluble fluoride salts such as potassium fluoride and ammonium fluoride are commonly used as catalysts to increase the removal rates of inert metals such as tungsten, titanium, platinum, nickel, and ruthenium. While the use of soluble fluoride compounds increases the speed at which periodic acid or hydrogen peroxide reacts with tungsten and titanium nitride, they also require CMP slurries with large concentrations of dissolved, ionic components. As a result, the polished substrates can become contaminated by the adsorption of charged species from the soluble compounds such as hydrofluoric acid or ammonium fluoride. These species can migrate and change the electrical properties of the IC chip, for example at gates and contacts, and change the effective dielectric properties of dielectric layers. These changes may reduce the reliability of the integrated circuits with time.
During chemical mechanical planarization of tungsten, the dielectric layer (for example, PETEOS) chemically reacts with the slurry particles under acidic or basic conditions. As a result of this chemical reaction, erosion of the dielectric layer occurs, which leads to non-planarization and a loss in IC device yield. Therefore, it is desirable to design slurries that minimize the dielectric loss while maintaining high tungsten removal rates during chemical mechanical planarization. The dielectric layer loss can be prevented with additives in the slurry that protect the oxide layer without affecting the tungsten removal rates during polishing. A slurry composition that can produce a combination of high tungsten removal rates and low dielectric layer removal rates without introducing “catalyst” contamination, for example iron ions and/or fluoride ions that are absorbed onto the surface of the substrate, is highly desirable for use during IC device fabrication. The tungsten-to-dielectric layer selectivity requirements depends upon individual IC design rules. However, a slurry composition that can be tuned for tungsten-to-dielectric layer removal rate selectivity with a change in the concentration of components can be versatile in adopting to multiple design rules during tungsten polishing step. Non-aggressive slurry compositions with low static etch rate, high tungsten removal rates, and low dielectric layer removal rates are highly desirable for IC device fabrication.
Typically, slurries employing soluble fluoride ions are too aggressive and attack metal indiscriminately, which increases tungsten static etch rate; this leads to dishing of metal lines and recess of tungsten plugs. During and after the polishing step in the tungsten CMP process, soluble fluoride ions adsorb onto the dielectric layer surface, which causes defects. In some embodiments, the invention described herein allows the use of aluminum fluoride modified silica in the polishing slurries; this novel approach allows high tungsten and titanium removal rates followed by an easy removal of fluoride containing abrasive during cleaning step.
All references cited herein are incorporated by reference herein in their entireties.